3.1.6.3
SD Bit
The SD bit determines the format of acceleration data results. If the SD bit is set to a logic ’1’, unsigned results are transmitted,
with the zero-g level represented by a nominal value of 512. If the SD bit is cleared, signed results are transmitted, with the zero-
g level represented by a nominal value of 0.
SD
1
0
Operating Mode
Unsigned Data Output
Signed Data Output
3.1.6.4
OFMON Bit
The OFMON bit determines if the offset monitor circuit is enabled. If the OFMON bit is set to a logic ’1’, the offset monitor is
enabled. Refer to Section 3.8.5 for more information. If the OFMON bit is cleared, the offset monitor is disabled.
OFMON
1
0
Operating Mode
Offset Monitor Circuit Enabled
Offset Monitor Circuit Disabled
3.1.6.5
ARM Configuration Bits (A_CFG[2:0])
The ARM Configuration Bits (A_CFG[2:0]) select the mode of operation for the ARM_X/PCM_X, ARM_Y/PCM_Y pins.
Table 9. Arming Output Configuration
A_CFG[2]
0
0
0
0
1
1
1
1
A_CFG[1]
0
0
1
1
0
0
1
1
A-CFG[0]
0
1
0
1
0
1
0
1
Operating Mode
Arm Output Disabled
PCM Output
Moving Average Mode
Moving Average Mode
Count Mode
Count Mode
Unfiltered Mode
Unfiltered Mode
Output Type
Hi Impedance
Digital Output
Active High with Pulldown Current
Active Low with Pullup Current
Active High with Pulldown Current
Active Low with Pullup Current
Active High with Pulldown Current
Active Low with Pullup Current
Reference
Section 3.8.9.1
Section 3.8.9.1
Section 3.8.9.1
Section 3.8.9.2
Section 3.8.9.2
Section 3.8.9.3
Section 3.8.9.3
3.1.7
Axis Configuration Registers (DEVCFG_X, DEVCFG_Y)
The Axis configuration registers are read/write registers which contain axis specific configuration information. These registers
can be written during initialization, but are locked once the ENDINIT bit is set. These registers are included in the writable register
CRC check. Refer to Section 3.2.2 for details.
Table 10. Axis Configuration Registers
Location
Bit
Address
$0C
$0D
Register
DEVCFG_X
DEVCFG_Y
7
ST_X
ST_Y
6
Reserved
Reserved
5
Reserved
Reserved
4
Reserved
Reserved
3
LPF_X[3]
LPF_Y[3]
2
LPF_X[2]
LPF_Y[2]
1
LPF_X[1]
LPF_Y[1]
0
LPF_X[0]
LPF_Y[0]
Reset Value
0
0
0
0
0
0
0
0
MMA68xx
Sensors
Freescale Semiconductor, Inc.
15
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